The present invention relates to semiconductor devices, and more particularly, to a patternable protective cover for a semiconductor wafer substrate, wherein one or more devices reside on and may be fabricated from the semiconductor substrate.
A variety of semiconductor devices may be implemented on a substrate according to several known techniques. The semiconductor devices may perform, for example, electrical, mechanical, optical, or other functions, or combinations of such functions.
Often, a semiconductor wafer serves as a substrate for such devices. The devices may be fabricated from the semiconductor material of the substrate wafer itself using a variety of known processes, such as growth of various material layers on a surface of the substrate, ion implantation, diffusion, oxidation, photolithography, etching and many other processes. During fabrication, typically at least some portion of each device is formed xe2x80x9cwithinxe2x80x9d the substrate wafer, below the surface of the substrate, and may additionally include particular topographic or structural features near the substrate surface.
Alternatively, semiconductor devices may be fabricated from a first semiconductor wafer, and subsequently mounted on a second semiconductor wafer or other type of material that serves as a substrate. The semiconductor devices fabricated from the first wafer may be mounted on the substrate either as individual devices or groups of devices. In this case, the devices xe2x80x9creside onxe2x80x9d the substrate, as opposed to being xe2x80x9cfabricated fromxe2x80x9d the substrate, as discussed above.
For purposes of the present invention, either of the foregoing examples of substrates, namely, substrates on which semiconductor devices reside, and/or from which semiconductor devices are fabricated, is referred to as a xe2x80x9cdevicexe2x80x9d substrate. A device substrate may include one or a large number of devices.
Many known semiconductor devices are extremely fragile and/or sensitive to environmental hazards. Some examples of such hazards include contamination by dust or other particulates, moisture, and inadvertent scratching or other damage to portions of the surface of the devices that include xe2x80x9cactivexe2x80x9d areas. An active area of a device generally refers to a functional region such as an electrical contact, a semiconductor junction, an optically sensitive area, or a micro-mechanical structure.
Functional defects may result from one or more environmental hazards, as discussed above, and are a major cause of low device yield and other malperformance characteristics. Device damage due to any number of such hazards may occur, for example, during the process of xe2x80x9cdicingxe2x80x9d (separating the device substrate into individual devices), as well as during packaging of devices. Often, the number of functioning devices remaining after dicing and packaging is markedly reduced due to defects resulting from environmental hazards.
Various techniques are known in the art for protecting semiconductor devices on a substrate from such hazards. Some of these techniques include bonding a protective semiconductor cap wafer to a device substrate before dicing the substrate into individual devices. This technique has been employed particularly with wafer substrates of semiconductor devices that include micro-machined parts or microscopic mechanisms fabricated on the surface of the substrate, such as micro-electrical-mechanical systems or MEMS.
According to one known technique for protecting semiconductor micro-mechanical devices, an entire device substrate wafer is capped with another wafer using a pattern of glass-like xe2x80x9cpostsxe2x80x9d or xe2x80x9cfrit glassxe2x80x9d as a bonding agent. In this technique, the micro-mechanical devices are hermetically sealed inside an open cavity formed by the frit glass pattern, the device substrate and the cap wafer. Accordingly, any micro-mechanisms are free to move while simultaneously being protected from various environmental hazards, such as particulate contamination.
According to the technique discussed above, the cap wafer is typically another semiconductor wafer of the same type as that used for the device substrate (for example, silicon or gallium arsenide). As a result, the cap wafer has essentially identical thermal characteristics to that of the device substrate. This choice of cap wafer avoids most mechanical stresses that may result from a thermal mismatch between the cap wafer and the device substrate. For example, extreme mechanical stress can occur during a high temperature heat treatment necessary to ensure adequate bonding of the frit glass to the cap wafer and the device substrate. Any mechanical stress can severely damage or even destroy the devices on the substrate, and would especially degrade the accuracy of many delicate micro-machined devices, such as microscopic mechanical sensors or other MEMS.
It is also noteworthy in the technique discussed above that any processing steps required for fabrication of the cap wafer are performed before the cap wafer is bonded to the device substrate. For example, in some instances, one or more holes which extend completely through the cap wafer are provided by drilling or anisotropic etching, so as to allow for electrical connections to the devices on the device substrate. These drilling or etching steps are performed before assembly of the cap wafer and the device substrate, so as to avoid damage to the delicate micro-mechanical devices on the substrate.
Another known protective packaging technique has been employed with semiconductor image sensors. This technique differs from the protective capping technique used for micro-mechanical devices, as discussed above. In the technique for protecting micro-mechanical devices, an entire device substrate of micro-mechanical devices is protected with a cap wafer before dicing. In contrast, in the technique for protecting image sensors, each discrete image sensor is individually equipped with a protective glass cap after the image sensor has been separated from the device substrate. The image sensor protection technique also differs from the micro-mechanical device protection technique in that the protective cap must be transparent to a variety of radiation wavelengths, and more specifically, to a particular radiation wavelength range of interest so that the image sensors are not blocked from receiving the radiation of interest.
According to one technique for protecting semiconductor image sensors, each individual image sensor is bonded in a cavity package, such as a ceramic package, and the protective glass cover is attached to the package with an optically compatible adhesive that substantially underfills the glass cover.
There are a number of drawbacks to this approach. First, the image sensor surface is exposed during the entire packaging operation, and therefore it is still vulnerable to damage from several types of environmental hazards, including particulate contamination. Second, any particles trapped in the package after the glass cover is attached can lead to unpredictable in-use failure of the image sensor at some later time. Third, the protective glass caps must be individually fabricated and individually attached, which is expensive. In addition, this technique cannot be readily implemented with micro-mechanical devices, because the adhesive underfills the protective glass cap and leaves essentially no open cavity to allow useful movement of a micro-mechanism.
In view of the foregoing, it would be advantageous to protect semiconductor devices, such as image sensors, on a xe2x80x9cwaferxe2x80x9d level; namely, simultaneously protecting one or more devices residing on or fabricated from a device substrate, as opposed to protecting individual devices after the device wafer has been diced. While such a wafer level technique has been employed with micro-mechanical devices by using a semiconductor cap wafer, as discussed above, the capping technique employed for micro-mechanical devices does not permit exposure of the devices to various radiation wavelength ranges of interest, as would be necessary for image sensor applications, because the semiconductor cap wafer has only a specific transparency to a particular wavelength range (typically infrared radiation). Furthermore, it would be advantageous to protect a variety of semiconductor devices, including image sensors and micro-mechanical devices, with an easily patternable protective cover that can be attached to a device substrate in a manner that avoids mechanical stress, and in particular, thermally induced mechanical stress.
Accordingly, the present invention is directed to a wafer level cover cap for semiconductor wafer devices. According to the method and apparatus of one embodiment of the invention, a cover wafer of material that is at least one of photo-etchable or transparent is patterned and attached to a device substrate to form an assembly. The cover wafer may be patterned either before or after being attached to the device substrate to form the assembly. Additionally, the cover wafer may be attached to the device substrate, for example, by coating either or both of the cover wafer and the device substrate with an appropriate adhesive.
Preferably, the cover wafer is made from a photo-etchable material so that portions of the cover wafer may be selectively sensitized and etched. In this manner, one or more cover caps may be defined in the cover wafer, such that each cover cap corresponds to a respective device on the device substrate.
Additionally, in one example of a cover cap according to the invention, the cover wafer may be patterned so as to define various optical components integrated with the cover caps. For example, the optical components may include diffractive microlenses or filters, which would be advantageous for many image sensing applications.
While particularly advantageous for applications involving image sensors, a cover cap for semiconductor wafer devices according to the invention would provide several advantages for a number of semiconductor applications, including those related to micro-mechanical devices. For example, using a photo-etchable material for the cover wafer provides for ease of patterning of specific areas of the cover wafer corresponding to respective devices on the device substrate, either before or after the cover wafer is attached to the device substrate to form an assembly. Additionally, whether patterned before or after the assembly is formed, the cover wafer provides protection to the entire device substrate during the dicing and packaging processes.
In particular, a cover wafer attached to the device substrate prior to dicing and packaging provides more robust devices by preventing particles from collecting over sensitive surfaces of the devices and scratching these surfaces. As a result, the method and apparatus of the invention allows for dicing of the assembly into individual devices and packaging the devices without the need for special clean-room facilities. Additionally, particularly in connection with image sensor applications, covering an entire device substrate with a cover wafer eliminates the need to specially handle individual pieces of glass for each device, and therefore reduces expenses associated with piece-wise device transportation and storage, inspection, and application of bonding agents such as adhesives.
In one aspect, the method of fabricating semiconductor wafer devices having a cover cap according to the invention includes selectively sensitizing regions of a photo-etchable cover wafer to define one or more cover caps which form a cover configuration. The cover wafer is selectively sensitized, for example, by exposing selected portions of the cover wafer, which have been masked using known photoresist techniques, to a radiation source. The step of exposing the cover wafer to a radiation source may be followed by a step of heat-treating the cover wafer. The exposing and heat-treating steps are employed to alter physical properties of the cover wafer, or xe2x80x9cselectively sensitivexe2x80x9d portions of the cover wafer. The selectively sensitized cover wafer is then etched with an etchant to produce the cover configuration including one or more cover caps. The cover configuration, as patterned in the cover wafer, may additionally include a plurality of connective support beams which interconnect a plurality of cover caps.
In another aspect, the cover wafer is attached to the semiconductor device substrate using an adhesive, either before or after the cover wafer is patterned to form the cover configuration. Preferably, the adhesive is curable by heat using a temperature that minimizes a thermal expansion mismatch between the cover wafer and the device substrate. The adhesive may be applied to at least a portion or an entire surface of either the cover wafer or the device substrate. Furthermore, the adhesive may be applied in one or more contour patterns, such that each contour pattern essentially corresponds to a perimeter of a respective device on the device substrate. In this manner, an active area of each device remains substantially free of the adhesive. The contour patterns of adhesive may be applied, for example, by screen printing.
In another aspect, at least one of the devices of the device substrate is an image sensor. In this aspect, the cover wafer is optically transparent and includes at least one polishable, substantially optically flat, and substantially scratch-resistant surface. For image sensor applications in which an adhesive is used to attach the cover wafer or configuration to the device substrate, the adhesive is preferably optically transparent and has a refractive index that is related to, or xe2x80x9cmatchedxe2x80x9d to, the refractive index of the cover wafer, such that reflections of radiation incident to the image sensor are minimized.
In another aspect, the assembly of the cover configuration and the device substrate is diced into one or more devices, such that each device includes a portion of the cover configuration as the cover cap. The diced devices are then packaged using a variety of techniques. A diced device may be packaged by encapsulating the diced device in a molded plastic package such that the cover cap is exposed, by assembling the diced device on a ball-grid array using glob-top encapsulation of any wires attached to the diced device, or attaching the diced device to a printed circuit board using at least one solder ball, wherein the thickness of the cover cap is less than the diameter of the solder ball.
Other advantages, novel features and objects of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.